Research Areas

Development of Next Generation Electronic Design Automation Tools

Security Infused Electronic Design Automation

Current optimization strategies in EDA tools utilize local optimization on small groups of logic gates. While this strategy is able to improve performance, power, and area, the localized optimization approach struggles to share logic between heterogenous components in the integrated circuit (IC) design. As more designs are utilizing heterogenous components and are segmenting designs to reduce complexity, it is vital to create new algorithms that are able to effectively combine logic between heterogenous logic structures contained on the IC design to reduce susceptibility to attacks that are able to isolate logic added for security and to reduce susceptibility to side-channel attacks.

Machine Learning Guided Logic Synthesis

Integrated circuits (ICs) have become a forefront of society, and with current artificial intelligence (AI) models such as OpenAI’s ChatGPT, the need for ICs to fuel the next generation of technology is even more apparent. With many consumer ICs requiring billions, if not trillions, of transistors, it is infeasible to design ICs by hand. Instead, electronic design automation (EDA) tools are utilized to help automate the design process. While extremely helpful, the current automation algorithms are only able to optimize small pieces of the circuit at any given time, leading to a gap between EDA optimized and truly optimal results. The VCATS lab is developing machine learning (ML) guided algorithms to enhance the abilities of current logic synthesis tools and overcome the limitations of current algorithms.


Secure Computer Architecture

Cybersecurity is dependent on software security in a reactionary fashion. Developed software is found to have security critical bugs and is then patched to fix the underlying security concern. This model exposes users to security compromises until the bugs are found by a trusted entity and patched. Compounding this problem is that the number of programmers quickly outpaces the number of cybersecurity professionals, increasing the footprint of software bugs needing to be patched. The VCATS lab is focusing on addressing the issue of software security at the hardware level. By re-imagining the system architecture and underlying security assumptions, the effect of insecure software can be significantly reduced.


Resilient and Secure Machine Learning Systems

Machine learning (ML) has introduced a wide variety of exciting new applications. However, the resiliency and security of the models and associated systems is still being understood. This work examines how hardware errors and malicious alterations to a ML model can alter performance. Additionally, ways to protect models for hardware errors or malicious actions are explored to ensure correct operation when an ML model is deployed.

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